One form of semiconductor memory is a nonvolatile memory in which the memory state of a memory cell is determined by whether or not an electrical charge is stored on a charge storage layer built into the gate structure of a field effect transistor. To enhance the storage capacity of such a nonvolatile memory, two storage nodes can be built into each memory cell. The storage nodes are associated with locations in charge storage layers at opposite sides of the gate structure. As the capacity of semiconductor memories increases, the size of each individual device used to implement the memory shrinks in size. With a memory that uses dual storage nodes per memory cell, the reduction in device size means that the spacing between the two storage nodes of a memory cell decreases. As the spacing between storage nodes decreases, problems arise with respect to the reliability and retention of the memory data. Charge stored in one memory node of the memory cell may leak through the gate structure to the other memory node to corrupt the memory stored at that other memory node. Additionally, as device size decreases, programming of one memory node can disturb the data stored in the other memory node due to relatively wide charge distributions in the charge storage layer. Such problems limit the possible choices for erasing such dual bit memory cells.
Accordingly, it is desirable to provide methods for fabricating semiconductor memory devices that have enhanced isolation between memory storage nodes of a dual bit memory cell. In addition, it is desirable to provide methods for fabricating semiconductor memory devices in which a gate insulator separating two memory storage nodes can be formed independently of the insulators of the charge storage node. Additionally, it is desirable to provide methods for fabricating dual bit memory cell devices that can be erased by Fowler-Nordheim (FN) tunneling for less power consumption. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.